Summer Semester 2009/10
Summer Semester 2010/11
Summer Semester 2011/12
Summer Semester 2012/13
Summer Semester 2013/14
Problem Laboratory ES1A621353
Course content:Introduction to Quartus II software and to hardware description language HDL. Designing procedure for combinatory and sequence logic systems consisting of standard library's and blocks written in the AHDL language. Designing and testing users library's. Translation of the projects consisting of standard library blocks to VHDL language. Decomposition of complex project to hierarchical structure of the simple elements. Communication witch standard external devices (display, keyboard). Individual project based on FPGA device.
Learning outcomes:Ability to implementing programmable logic device (FPGA) into practical projects. Practical experience witch hardware description language VHDL. Ability to work alone on a topic through carrying out reading and other research, design, planning, implementation and testing.
(in Polish) Rodzaj przedmiotu
Course coordinators
Bibliography
a) basic references:
1.Depending on chosen project topic.
2.IEEE-SA Standards Board: IEEE Standard VHDL Language reference manual, ieeexplore.ieee.org/iel5/7180/19335/00893288.pdf, USA, 2000.
3.Łuba T.: Synteza układów cyfrowych, WKiŁ, Warszawa, 2004.
4.Mano M.M., Kime Ch.R.: Podstawy projektowania układów logicznych i komputerów, NT, Warszawa 2007.
5.Skahill K.: Język VHDL Projektowanie programowalnych układów logicznych, WNT, Warszawa, 2001.
b) supplementary references:
1.Altera Corp.: Introduction to the Quartus II Software, San Jose, http://www.altera.com/literature/manual/intro_to_quartus2.pdf, 2010.
2.HARDI Electronics AB.: VHDL handbook, Lund, Sweden, www.hardi.com, info@hardi.com, 2000. Kalisz J.: Język VHDL w praktyce, WKiŁ, Warszawa, 2002.